Emulator II Main Debug Eprom

[RobyMX]

Hi all, I'm new to this forum. I have recently purchased a broken E2+ and
want to ask if someone have some experience in the use of the Main
Debug Eprom.
Thanks

[PJ-GOTH]

Hi Roby!! WELCOME in the Emulator users club!
I wish you will find the right answer for your question...here you can find some great users that i'm sure they will help you!
Talk soon
PJ

[RobyMX]

Hi, finally I have a functional Debug Eprom on my EII+... funny!
So, now I can test some of the circuits on the MAIN-side Z80...
SRAM: OK
DRAM: OK (at least 16 banks, 512Kb)
Disk Drive: OK (made Exercise Disk and Test Disk)

But unfortunately the EII doesn't work... In normal setup,
when I try to start-up it with a performance disk, the drive
make three clicks and then it stops (and its light goes off).
I have already clean the connectors, redone the soldering
on the power connector and reseat the ICs...
I suspect that the problem is in the communication between
the SCANNER CPU and the MAIN CPU. Do someone know how
it works in details, or if it is described in the Service manual?

Thanks

[Chaztech]

Hi Roby!

Look at your memory ic's
the boot will hang if any one of the first section is bad after that bad ram will cause distorted output or clicking!
I posted some info on this ill try and find a link to it! but check around the RAM ic's

I have a memory test disk if your interested!

[RobyMX]

Hi Chaztech,
thanks for your reply!
I've checked the DRAMs with the debug Eprom,
to be sure that the the addressing logic was OK,
and within another sampler, to be sure that the
chips was OK also... and both the tests was passed
correctly. I know that the EII+ have 1Mb of RAM, and
the diagnostic test only 512Kb, but I think that only
the low segment of DRAM is used to load the O.S.
I don't know if the memory test disk can help me...
On the Diagnostics sheets (Problem #1) there is a
reference on a bidirectional bus that connect the MAIN
CPU to SCANNER CPU, and I've learned how this
communication works... And I've seen that the MAIN
CPU give data to the SCANNER CPU (which display
the O.S. version correctly), but the SCANNER CPU
doesn't initiate a reply to the MAIN CPU...
The SCANNER CPU is functional, because the display
works correctly, and the PIO of the SCANNER CPU is
functional also, because it receive (and display) the
O.S. version from the MAIN CPU.
I will investigate further...

[RobyMX]

Perhaps the memory test disk can be useful...
If I've understand correctly, is a program that load from disk and show the
tests/results on the display... So this can be an exercise to load and execute
an application from disk on the main RAM, test the RAM and, probably, test
the communication between the MAIN CPU and the SCANNER CPU.
What do you think about this?

[RobyMX]

OK, after further investigations on a functional E2, now I'm sure
that the problem lies in the parallel communication bus between
SCANNER CPU and MAIN CPU. The MAIN CPU send a message to
the SCANNER CPU, but the SCANNER CPU doesn't initiate a
reply (as it happens on a functional E2). Now I have to understand
on what type of messages is based the communication.
Someone that have a Service Manual can tell me if there is a
section describing those messages?
Thank you

[RobyMX]

OK, EII+ repaired!!!
 
What a beautiful sounds...